Initialize.

8 files changed, 973 insertions, 0 deletions

diff --git a/pyecsca/codegen/hal/xmega/Makefile.xmega b/pyecsca/codegen/hal/xmega/Makefile.xmega
new file mode 100644
index 0000000..8b7950e
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/Makefile.xmega
@@ -0,0 +1,13 @@
+VPATH += :$(HALPATH)/xmega
+SRC += uart.c usart_driver.c xmega_hal.c
+EXTRAINCDIRS += $(HALPATH)/xmega
+
+MCU_FLAGS = -mmcu=$(MCU)
+CFLAGS += -fpack-struct
+
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+AR = avr-ar rcs
+NM = avr-nm
\ No newline at end of file
diff --git a/pyecsca/codegen/hal/xmega/avr_compiler.h b/pyecsca/codegen/hal/xmega/avr_compiler.h
new file mode 100644
index 0000000..b5422a6
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/avr_compiler.h
@@ -0,0 +1,154 @@
+/* This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief This file implements some macros that makes the IAR C-compiler and
+ *        avr-gcc work with the same code base for the AVR architecture.
+ *
+ * \par Documentation
+ *      For comprehensive code documentation, supported compilers, compiler
+ *      settings and supported devices see readme.html
+ *
+ * \author
+ *      Atmel Corporation: http://www.atmel.com \n
+ *      Support email: avr@atmel.com
+ *
+ * $Revision: 1694 $
+ * $Date: 2008-07-29 14:21:58 +0200 (ti, 29 jul 2008) $  \n
+ *
+ * Copyright (c) 2008, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ ******************************************************************************/
+
+#ifndef COMPILER_AVR_H
+#define COMPILER_AVR_H
+
+#ifndef F_CPU
+/*! \brief Define default CPU frequency, if this is not already defined. */
+#define F_CPU 2000000UL
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+/*! \brief This macro will protect the following code from interrupts. */
+#define AVR_ENTER_CRITICAL_REGION( ) uint8_t volatile saved_sreg = SREG; \
+                                     cli();
+
+/*! \brief This macro must always be used in conjunction with AVR_ENTER_CRITICAL_REGION
+ *        so the interrupts are enabled again.
+ */
+#define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;
+
+#if defined( __ICCAVR__ )
+
+#include <inavr.h>
+#include <ioavr.h>
+#include <intrinsics.h>
+#include <pgmspace.h>
+
+#ifndef __HAS_ELPM__
+#define _MEMATTR  __flash
+#else /* __HAS_ELPM__ */
+#define _MEMATTR  __farflash
+#endif /* __HAS_ELPM__ */
+
+/*! \brief Perform a delay of \c us microseconds.
+ *
+ *  The macro F_CPU is supposed to be defined to a constant defining the CPU
+ *  clock frequency (in Hertz).
+ *
+ *  The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ *
+ *  \note For the IAR compiler, currently F_CPU must be a
+ *        multiple of 1000000UL (1 MHz).
+ */
+#define delay_us( us )   ( __delay_cycles( ( F_CPU / 1000000UL ) * ( us ) ) )
+
+/*! \brief Preprocessor magic.
+ *
+ *  Some preprocessor magic to allow for a header file abstraction of
+ *  interrupt service routine declarations for the IAR compiler.  This
+ *  requires the use of the C99 _Pragma() directive (rather than the
+ *  old #pragma one that could not be used as a macro replacement), as
+ *  well as two different levels of preprocessor concetanations in
+ *  order to do both, assign the correct interrupt vector name, as well
+ *  as construct a unique function name for the ISR.
+ *
+ *  \note Do *NOT* try to reorder the macros below, as this will only
+ *        work in the given order.
+ */
+#define PRAGMA(x) _Pragma( #x )
+#define ISR(vec) PRAGMA( vector=vec ) __interrupt void handler_##vec(void)
+#define sei( ) (__enable_interrupt( ))
+#define cli( ) (__disable_interrupt( ))
+
+/*! \brief Define the no operation macro. */
+#define nop( ) (__no_operation())
+
+/*! \brief Define the watchdog reset macro. */
+#define watchdog_reset( ) (__watchdog_reset( ))
+
+
+#define INLINE PRAGMA( inline=forced ) static
+
+#define FLASH_DECLARE(x) _MEMATTR x
+#define FLASH_STRING(x) ((_MEMATTR const char *)(x))
+#define FLASH_STRING_T  char const _MEMATTR *
+#define FLASH_BYTE_ARRAY_T uint8_t const _MEMATTR *
+#define PGM_READ_BYTE(x) *(x)
+#define PGM_READ_WORD(x) *(x)
+
+#define SHORTENUM /**/
+
+#elif defined( __GNUC__ )
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <util/delay.h>
+
+/*! \brief Define the delay_us macro for GCC. */
+#define delay_us( us )   (_delay_us( us ))
+
+#define INLINE static inline
+
+/*! \brief Define the no operation macro. */
+#define nop()   do { __asm__ __volatile__ ("nop"); } while (0)
+
+#define MAIN_TASK_PROLOGUE int
+
+
+#define MAIN_TASK_EPILOGUE() return -1;
+
+#define SHORTENUM __attribute__ ((packed))
+
+#else
+#error Compiler not supported.
+#endif
+
+#endif
+
diff --git a/pyecsca/codegen/hal/xmega/uart.c b/pyecsca/codegen/hal/xmega/uart.c
new file mode 100644
index 0000000..692a019
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/uart.c
@@ -0,0 +1,70 @@
+#include "uart.h"
+
+/*! Define that selects the Usart used in example. */
+#define USART USARTC0
+
+#define TIMEOUT 0
+#define BYTE_REC 1
+
+void init_uart0(void)
+    {
+    /* This PORT setting is only valid to USARTC0 if other USARTs is used a
+     * different PORT and/or pins is used. */
+    /* PIN3 (TXD0) as output. */
+    PORTC.DIRSET = PIN3_bm;
+
+    /* PC2 (RXD0) as input. */
+    PORTC.DIRCLR = PIN2_bm;
+
+    /* USARTC0, 8 Data bits, No Parity, 1 Stop bit. */
+    USART_Format_Set(&USART, USART_CHSIZE_8BIT_gc, USART_PMODE_DISABLED_gc, false);
+
+    /* Set Baudrate to 9600 bps:
+     * Use the default I/O clock fequency that is 2 MHz.
+     * Do not use the baudrate scale factor
+     *
+     * Baudrate select = (1/(16*(((I/O clock frequency)/Baudrate)-1)
+     *                 = 12
+     */
+    USART_Baudrate_Set(&USART, 11, 0);
+
+    /* Enable both RX and TX. */
+    USART_Rx_Enable(&USART);
+    USART_Tx_Enable(&USART);
+    }
+
+unsigned char input_ch_w_timeout_0(char * data, volatile unsigned int timeout)
+    {
+    unsigned int				timeout_counter = 0;
+
+
+    //check if a byte has been recieved or if the timeout has been excedded
+    while (timeout_counter != timeout)
+        {
+        if (USART_IsRXComplete(&USART))
+            {
+            *data = USART_GetChar(&USART);
+            return BYTE_REC;
+            }
+        timeout_counter++;
+        }
+
+    return TIMEOUT;
+    }
+
+char input_ch_0(void)
+    {
+    //check if a byte has been recieved or if the timeout has been excedded
+    while (!USART_IsRXComplete(&USART))
+        {
+        continue;
+        }
+    return USART_GetChar(&USART);;
+    }
+	
+void output_ch_0(char data)
+    {
+    while(!USART_IsTXDataRegisterEmpty(&USART));
+    USART_PutChar(&USART, data);
+    return;
+    }
\ No newline at end of file
diff --git a/pyecsca/codegen/hal/xmega/uart.h b/pyecsca/codegen/hal/xmega/uart.h
new file mode 100644
index 0000000..b7a6be6
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/uart.h
@@ -0,0 +1,23 @@
+#ifndef UART_H_
+#define UART_H_
+
+#include "usart_driver.h"
+#include "avr_compiler.h"
+
+
+//Init UART0, set to baud rate as defined in header file
+void init_uart0(void);
+
+//Input a char on UART0 and store it to data, however if no char is recieved
+//within timeout, then abort and return TIMEOUT, otherwise return BYTE_REC
+//(note: timeout is NOT a reliable value, as it uses a simple C loop that
+//will change with different compiler settings likely
+unsigned char input_ch_w_timeout_0(char * data, unsigned int timeout);
+
+//wait forever for a char on UART 0 and return it
+char input_ch_0(void);
+
+//output char data on UART0
+void output_ch_0(char data);
+
+#endif //UART_H_
\ No newline at end of file
diff --git a/pyecsca/codegen/hal/xmega/usart_driver.c b/pyecsca/codegen/hal/xmega/usart_driver.c
new file mode 100644
index 0000000..b6d5ef9
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/usart_driver.c
@@ -0,0 +1,320 @@
+/* This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief
+ *      XMEGA USART driver source file.
+ *
+ *      This file contains the function implementations the XMEGA interrupt
+ *      and polled USART driver.
+ *
+ *      The driver is not intended for size and/or speed critical code, since
+ *      most functions are just a few lines of code, and the function call
+ *      overhead would decrease code performance. The driver is intended for
+ *      rapid prototyping and documentation purposes for getting started with
+ *      the XMEGA ADC module.
+ *
+ *      For size and/or speed critical code, it is recommended to copy the
+ *      function contents directly into your application instead of making
+ *      a function call.
+ *
+ *      Some functions use the following construct:
+ *          "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..."
+ *      Although the use of the ternary operator ( if ? then : else ) is discouraged,
+ *      in some occasions the operator makes it possible to write pretty clean and
+ *      neat code. In this driver, the construct is used to set or not set a
+ *      configuration bit based on a boolean input parameter, such as
+ *      the "some_parameter" in the example above.
+ *
+ * \par Application note:
+ *      AVR1307: Using the XMEGA USART
+ *
+ * \par Documentation
+ *      For comprehensive code documentation, supported compilers, compiler
+ *      settings and supported devices see readme.html
+ *
+ * \author
+ *      Atmel Corporation: http://www.atmel.com \n
+ *      Support email: avr@atmel.com
+ *
+ * $Revision: 1694 $
+ * $Date: 2008-07-29 14:21:58 +0200 (ti, 29 jul 2008) $  \n
+ *
+ * Copyright (c) 2008, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *****************************************************************************/
+#include "usart_driver.h"
+
+
+
+/*! \brief Initializes buffer and selects what USART module to use.
+ *
+ *  Initializes receive and transmit buffer and selects what USART module to use,
+ *  and stores the data register empty interrupt level.
+ *
+ *  \param usart_data           The USART_data_t struct instance.
+ *  \param usart                The USART module.
+ *  \param dreIntLevel          Data register empty interrupt level.
+ */
+void USART_InterruptDriver_Initialize(USART_data_t * usart_data,
+                                      USART_t * usart,
+                                      USART_DREINTLVL_t dreIntLevel)
+{
+	usart_data->usart = usart;
+	usart_data->dreIntLevel = dreIntLevel;
+
+	usart_data->buffer.RX_Tail = 0;
+	usart_data->buffer.RX_Head = 0;
+	usart_data->buffer.TX_Tail = 0;
+	usart_data->buffer.TX_Head = 0;
+}
+
+
+/*! \brief Set USART DRE interrupt level.
+ *
+ *  Set the interrupt level on Data Register interrupt.
+ *
+ *  \note Changing the DRE interrupt level in the interrupt driver while it is
+ *        running will not change the DRE interrupt level in the USART before the
+ *        DRE interrupt have been disabled and enabled again.
+ *
+ *  \param usart_data         The USART_data_t struct instance
+ *  \param dreIntLevel        Interrupt level of the DRE interrupt.
+ */
+void USART_InterruptDriver_DreInterruptLevel_Set(USART_data_t * usart_data,
+                                                 USART_DREINTLVL_t dreIntLevel)
+{
+	usart_data->dreIntLevel = dreIntLevel;
+}
+
+
+/*! \brief Test if there is data in the transmitter software buffer.
+ *
+ *  This function can be used to test if there is free space in the transmitter
+ *  software buffer.
+ *
+ *  \param usart_data The USART_data_t struct instance.
+ *
+ *  \retval true      There is data in the receive buffer.
+ *  \retval false     The receive buffer is empty.
+ */
+bool USART_TXBuffer_FreeSpace(USART_data_t * usart_data)
+{
+	/* Make copies to make sure that volatile access is specified. */
+	uint8_t tempHead = (usart_data->buffer.TX_Head + 1) & USART_TX_BUFFER_MASK;
+	uint8_t tempTail = usart_data->buffer.TX_Tail;
+
+	/* There are data left in the buffer unless Head and Tail are equal. */
+	return (tempHead != tempTail);
+}
+
+
+
+/*! \brief Put data (5-8 bit character).
+ *
+ *  Stores data byte in TX software buffer and enables DRE interrupt if there
+ *  is free space in the TX software buffer.
+ *
+ *  \param usart_data The USART_data_t struct instance.
+ *  \param data       The data to send.
+ */
+bool USART_TXBuffer_PutByte(USART_data_t * usart_data, uint8_t data)
+{
+	uint8_t tempCTRLA;
+	uint8_t tempTX_Head;
+	bool TXBuffer_FreeSpace;
+	USART_Buffer_t * TXbufPtr;
+
+	TXbufPtr = &usart_data->buffer;
+	TXBuffer_FreeSpace = USART_TXBuffer_FreeSpace(usart_data);
+
+
+	if(TXBuffer_FreeSpace)
+	{
+	  	tempTX_Head = TXbufPtr->TX_Head;
+	  	TXbufPtr->TX[tempTX_Head]= data;
+		/* Advance buffer head. */
+		TXbufPtr->TX_Head = (tempTX_Head + 1) & USART_TX_BUFFER_MASK;
+
+		/* Enable DRE interrupt. */
+		tempCTRLA = usart_data->usart->CTRLA;
+		tempCTRLA = (tempCTRLA & ~USART_DREINTLVL_gm) | usart_data->dreIntLevel;
+		usart_data->usart->CTRLA = tempCTRLA;
+	}
+	return TXBuffer_FreeSpace;
+}
+
+
+
+/*! \brief Test if there is data in the receive software buffer.
+ *
+ *  This function can be used to test if there is data in the receive software
+ *  buffer.
+ *
+ *  \param usart_data         The USART_data_t struct instance
+ *
+ *  \retval true      There is data in the receive buffer.
+ *  \retval false     The receive buffer is empty.
+ */
+bool USART_RXBufferData_Available(USART_data_t * usart_data)
+{
+	/* Make copies to make sure that volatile access is specified. */
+	uint8_t tempHead = usart_data->buffer.RX_Head;
+	uint8_t tempTail = usart_data->buffer.RX_Tail;
+
+	/* There are data left in the buffer unless Head and Tail are equal. */
+	return (tempHead != tempTail);
+}
+
+
+
+/*! \brief Get received data (5-8 bit character).
+ *
+ *  The function USART_RXBufferData_Available should be used before this
+ *  function is used to ensure that data is available.
+ *
+ *  Returns data from RX software buffer.
+ *
+ *  \param usart_data       The USART_data_t struct instance.
+ *
+ *  \return         Received data.
+ */
+uint8_t USART_RXBuffer_GetByte(USART_data_t * usart_data)
+{
+	USART_Buffer_t * bufPtr;
+	uint8_t ans;
+
+	bufPtr = &usart_data->buffer;
+	ans = (bufPtr->RX[bufPtr->RX_Tail]);
+
+	/* Advance buffer tail. */
+	bufPtr->RX_Tail = (bufPtr->RX_Tail + 1) & USART_RX_BUFFER_MASK;
+
+	return ans;
+}
+
+
+
+/*! \brief RX Complete Interrupt Service Routine.
+ *
+ *  RX Complete Interrupt Service Routine.
+ *  Stores received data in RX software buffer.
+ *
+ *  \param usart_data      The USART_data_t struct instance.
+ */
+bool USART_RXComplete(USART_data_t * usart_data)
+{
+	USART_Buffer_t * bufPtr;
+	bool ans;
+
+	bufPtr = &usart_data->buffer;
+	/* Advance buffer head. */
+	uint8_t tempRX_Head = (bufPtr->RX_Head + 1) & USART_RX_BUFFER_MASK;
+
+	/* Check for overflow. */
+	uint8_t tempRX_Tail = bufPtr->RX_Tail;
+	uint8_t data = usart_data->usart->DATA;
+
+	if (tempRX_Head == tempRX_Tail) {
+	  	ans = false;
+	}else{
+		ans = true;
+		usart_data->buffer.RX[usart_data->buffer.RX_Head] = data;
+		usart_data->buffer.RX_Head = tempRX_Head;
+	}
+	return ans;
+}
+
+
+
+/*! \brief Data Register Empty Interrupt Service Routine.
+ *
+ *  Data Register Empty Interrupt Service Routine.
+ *  Transmits one byte from TX software buffer. Disables DRE interrupt if buffer
+ *  is empty. Argument is pointer to USART (USART_data_t).
+ *
+ *  \param usart_data      The USART_data_t struct instance.
+ */
+void USART_DataRegEmpty(USART_data_t * usart_data)
+{
+	USART_Buffer_t * bufPtr;
+	bufPtr = &usart_data->buffer;
+
+	/* Check if all data is transmitted. */
+	uint8_t tempTX_Tail = usart_data->buffer.TX_Tail;
+	if (bufPtr->TX_Head == tempTX_Tail){
+	    /* Disable DRE interrupts. */
+		uint8_t tempCTRLA = usart_data->usart->CTRLA;
+		tempCTRLA = (tempCTRLA & ~USART_DREINTLVL_gm) | USART_DREINTLVL_OFF_gc;
+		usart_data->usart->CTRLA = tempCTRLA;
+
+	}else{
+		/* Start transmitting. */
+		uint8_t data = bufPtr->TX[usart_data->buffer.TX_Tail];
+		usart_data->usart->DATA = data;
+
+		/* Advance buffer tail. */
+		bufPtr->TX_Tail = (bufPtr->TX_Tail + 1) & USART_TX_BUFFER_MASK;
+	}
+}
+
+
+/*! \brief Put data (9 bit character).
+ *
+ *  Use the function USART_IsTXDataRegisterEmpty before using this function to
+ *  put 9 bit character to the TX register.
+ *
+ *  \param usart      The USART module.
+ *  \param data       The data to send.
+ */
+void USART_NineBits_PutChar(USART_t * usart, uint16_t data)
+{
+	if(data & 0x0100) {
+		usart->CTRLB |= USART_TXB8_bm;
+	}else {
+		usart->CTRLB &= ~USART_TXB8_bm;
+	}
+
+	usart->DATA = (data & 0x00FF);
+}
+
+
+/*! \brief Get received data (9 bit character).
+ *
+ *  This function reads out the received 9 bit character (uint16_t).
+ *  Use the function USART_IsRXComplete to check if anything is received.
+ *
+ *  \param usart      The USART module.
+ *
+ *  \retval           Received data.
+ */
+uint16_t USART_NineBits_GetChar(USART_t * usart)
+{
+	if(usart->CTRLB & USART_RXB8_bm) {
+		return(0x0100 | usart->DATA);
+	}else {
+		return(usart->DATA);
+	}
+}
diff --git a/pyecsca/codegen/hal/xmega/usart_driver.h b/pyecsca/codegen/hal/xmega/usart_driver.h
new file mode 100644
index 0000000..3f73673
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/usart_driver.h
@@ -0,0 +1,306 @@
+/* This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief  XMEGA USART driver header file.
+ *
+ *      This file contains the function prototypes and enumerator definitions
+ *      for various configuration parameters for the XMEGA USART driver.
+ *
+ *      The driver is not intended for size and/or speed critical code, since
+ *      most functions are just a few lines of code, and the function call
+ *      overhead would decrease code performance. The driver is intended for
+ *      rapid prototyping and documentation purposes for getting started with
+ *      the XMEGA ADC module.
+ *
+ *      For size and/or speed critical code, it is recommended to copy the
+ *      function contents directly into your application instead of making
+ *      a function call.
+ *
+ * \par Application note:
+ *      AVR1307: Using the XMEGA USART
+ *
+ * \par Documentation
+ *      For comprehensive code documentation, supported compilers, compiler
+ *      settings and supported devices see readme.html
+ *
+ * \author
+ *      Atmel Corporation: http://www.atmel.com \n
+ *      Support email: avr@atmel.com
+ *
+ * $Revision: 1694 $
+ * $Date: 2008-07-29 14:21:58 +0200 (ti, 29 jul 2008) $  \n
+ *
+ * Copyright (c) 2008, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *****************************************************************************/
+#ifndef USART_DRIVER_H
+#define USART_DRIVER_H
+
+#include "avr_compiler.h"
+
+/* USART buffer defines. */
+
+/* \brief  Receive buffer size: 2,4,8,16,32,64,128 or 256 bytes. */
+#define USART_RX_BUFFER_SIZE 4
+/* \brief Transmit buffer size: 2,4,8,16,32,64,128 or 256 bytes */
+#define USART_TX_BUFFER_SIZE 4
+/* \brief Receive buffer mask. */
+#define USART_RX_BUFFER_MASK ( USART_RX_BUFFER_SIZE - 1 )
+/* \brief Transmit buffer mask. */
+#define USART_TX_BUFFER_MASK ( USART_TX_BUFFER_SIZE - 1 )
+
+
+#if ( USART_RX_BUFFER_SIZE & USART_RX_BUFFER_MASK )
+#error RX buffer size is not a power of 2
+#endif
+#if ( USART_TX_BUFFER_SIZE & USART_TX_BUFFER_MASK )
+#error TX buffer size is not a power of 2
+#endif
+
+
+/* \brief USART transmit and receive ring buffer. */
+typedef struct USART_Buffer
+{
+	/* \brief Receive buffer. */
+	volatile uint8_t RX[USART_RX_BUFFER_SIZE];
+	/* \brief Transmit buffer. */
+	volatile uint8_t TX[USART_TX_BUFFER_SIZE];
+	/* \brief Receive buffer head. */
+	volatile uint8_t RX_Head;
+	/* \brief Receive buffer tail. */
+	volatile uint8_t RX_Tail;
+	/* \brief Transmit buffer head. */
+	volatile uint8_t TX_Head;
+	/* \brief Transmit buffer tail. */
+	volatile uint8_t TX_Tail;
+} USART_Buffer_t;
+
+
+/*! \brief Struct used when interrupt driven driver is used.
+*
+*  Struct containing pointer to a usart, a buffer and a location to store Data
+*  register interrupt level temporary.
+*/
+typedef struct Usart_and_buffer
+{
+	/* \brief Pointer to USART module to use. */
+	USART_t * usart;
+	/* \brief Data register empty interrupt level. */
+	USART_DREINTLVL_t dreIntLevel;
+	/* \brief Data buffer. */
+	USART_Buffer_t buffer;
+} USART_data_t;
+
+
+/* Macros. */
+
+/*! \brief Macro that sets the USART frame format.
+ *
+ *  Sets the frame format, Frame Size, parity mode and number of stop bits.
+ *
+ *  \param _usart        Pointer to the USART module
+ *  \param _charSize     The character size. Use USART_CHSIZE_t type.
+ *  \param _parityMode   The parity Mode. Use USART_PMODE_t type.
+ *  \param _twoStopBits  Enable two stop bit mode. Use bool type.
+ */
+#define USART_Format_Set(_usart, _charSize, _parityMode, _twoStopBits)         \
+	(_usart)->CTRLC = (uint8_t) _charSize | _parityMode |                      \
+	                  (_twoStopBits ? USART_SBMODE_bm : 0)
+
+
+/*! \brief Set USART baud rate.
+ *
+ *  Sets the USART's baud rate register.
+ *
+ *  UBRR_Value   : Value written to UBRR
+ *  ScaleFactor  : Time Base Generator Scale Factor
+ *
+ *  Equation for calculation of BSEL value in asynchronous normal speed mode:
+ *  	If ScaleFactor >= 0
+ *  		BSEL = ((I/O clock frequency)/(2^(ScaleFactor)*16*Baudrate))-1
+ *  	If ScaleFactor < 0
+ *  		BSEL = (1/(2^(ScaleFactor)*16))*(((I/O clock frequency)/Baudrate)-1)
+ *
+ *	\note See XMEGA manual for equations for calculation of BSEL value in other
+ *        modes.
+ *
+ *  \param _usart          Pointer to the USART module.
+ *  \param _bselValue      Value to write to BSEL part of Baud control register.
+ *                         Use uint16_t type.
+ *  \param _bScaleFactor   USART baud rate scale factor.
+ *                         Use uint8_t type
+ */
+#define USART_Baudrate_Set(_usart, _bselValue, _bScaleFactor)                  \
+	(_usart)->BAUDCTRLA =(uint8_t)_bselValue;                                           \
+	(_usart)->BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8)
+
+
+/*! \brief Enable USART receiver.
+ *
+ *  \param _usart    Pointer to the USART module
+ */
+#define USART_Rx_Enable(_usart) ((_usart)->CTRLB |= USART_RXEN_bm)
+
+
+/*! \brief Disable USART receiver.
+ *
+ *  \param _usart Pointer to the USART module.
+ */
+#define USART_Rx_Disable(_usart) ((_usart)->CTRLB &= ~USART_RXEN_bm)
+
+
+/*! \brief Enable USART transmitter.
+ *
+ *  \param _usart Pointer to the USART module.
+ */
+#define USART_Tx_Enable(_usart)	((_usart)->CTRLB |= USART_TXEN_bm)
+
+
+/*! \brief Disable USART transmitter.
+ *
+ *  \param _usart Pointer to the USART module.
+ */
+#define USART_Tx_Disable(_usart) ((_usart)->CTRLB &= ~USART_TXEN_bm)
+
+
+/*! \brief Set USART RXD interrupt level.
+ *
+ *  Sets the interrupt level on RX Complete interrupt.
+ *
+ *  \param _usart        Pointer to the USART module.
+ *  \param _rxdIntLevel  Interrupt level of the RXD interrupt.
+ *                       Use USART_RXCINTLVL_t type.
+ */
+#define USART_RxdInterruptLevel_Set(_usart, _rxdIntLevel)                      \
+	((_usart)->CTRLA = ((_usart)->CTRLA & ~USART_RXCINTLVL_gm) | _rxdIntLevel)
+
+
+/*! \brief Set USART TXD interrupt level.
+ *
+ *  Sets the interrupt level on TX Complete interrupt.
+ *
+ *  \param _usart        Pointer to the USART module.
+ *  \param _txdIntLevel  Interrupt level of the TXD interrupt.
+ *                       Use USART_TXCINTLVL_t type.
+ */
+#define USART_TxdInterruptLevel_Set(_usart, _txdIntLevel)                      \
+	(_usart)->CTRLA = ((_usart)->CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel
+
+
+
+/*! \brief Set USART DRE interrupt level.
+ *
+ *  Sets the interrupt level on Data Register interrupt.
+ *
+ *  \param _usart        Pointer to the USART module.
+ *  \param _dreIntLevel  Interrupt level of the DRE interrupt.
+ *                       Use USART_DREINTLVL_t type.
+ */
+#define USART_DreInterruptLevel_Set(_usart, _dreIntLevel)                      \
+	(_usart)->CTRLA = ((_usart)->CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel
+
+
+/*! \brief Set the mode the USART run in.
+ *
+ * Set the mode the USART run in. The default mode is asynchronous mode.
+ *
+ *  \param  _usart       Pointer to the USART module register section.
+ *  \param  _usartMode   Selects the USART mode. Use  USART_CMODE_t type.
+ *
+ *  USART modes:
+ *  - 0x0        : Asynchronous mode.
+ *  - 0x1        : Synchronous mode.
+ *  - 0x2        : IrDA mode.
+ *  - 0x3        : Master SPI mode.
+ */
+#define USART_SetMode(_usart, _usartMode)                                      \
+	((_usart)->CTRLC = ((_usart)->CTRLC & (~USART_CMODE_gm)) | _usartMode)
+
+
+
+/*! \brief Check if data register empty flag is set.
+ *
+ *  \param _usart      The USART module.
+ */
+#define USART_IsTXDataRegisterEmpty(_usart) (((_usart)->STATUS & USART_DREIF_bm) != 0)
+
+
+
+/*! \brief Put data (5-8 bit character).
+ *
+ *  Use the macro USART_IsTXDataRegisterEmpty before using this function to
+ *  put data to the TX register.
+ *
+ *  \param _usart      The USART module.
+ *  \param _data       The data to send.
+ */
+#define USART_PutChar(_usart, _data) ((_usart)->DATA = _data)
+
+
+
+/*! \brief Checks if the RX complete interrupt flag is set.
+ *
+ *   Checks if the RX complete interrupt flag is set.
+ *
+ *  \param _usart     The USART module.
+ */
+#define USART_IsRXComplete(_usart) (((_usart)->STATUS & USART_RXCIF_bm) != 0)
+
+
+
+
+/*! \brief Get received data (5-8 bit character).
+ *
+ *  This macro reads out the RX register.
+ *  Use the macro USART_RX_Complete to check if anything is received.
+ *
+ *  \param _usart     The USART module.
+ *
+ *  \retval           Received data.
+ */
+#define USART_GetChar(_usart)  ((_usart)->DATA)
+
+
+/* Functions for interrupt driven driver. */
+void USART_InterruptDriver_Initialize(USART_data_t * usart_data,
+                                      USART_t * usart,
+                                      USART_DREINTLVL_t dreIntLevel );
+
+void USART_InterruptDriver_DreInterruptLevel_Set(USART_data_t * usart_data,
+                                                 USART_DREINTLVL_t dreIntLevel);
+
+bool USART_TXBuffer_FreeSpace(USART_data_t * usart_data);
+bool USART_TXBuffer_PutByte(USART_data_t * usart_data, uint8_t data);
+bool USART_RXBufferData_Available(USART_data_t * usart_data);
+uint8_t USART_RXBuffer_GetByte(USART_data_t * usart_data);
+bool USART_RXComplete(USART_data_t * usart_data);
+void USART_DataRegEmpty(USART_data_t * usart_data);
+
+/* Functions for polled driver. */
+void USART_NineBits_PutChar(USART_t * usart, uint16_t data);
+uint16_t USART_NineBits_GetChar(USART_t * usart);
+
+#endif
diff --git a/pyecsca/codegen/hal/xmega/xmega_hal.c b/pyecsca/codegen/hal/xmega/xmega_hal.c
new file mode 100644
index 0000000..c9fc12a
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/xmega_hal.c
@@ -0,0 +1,42 @@
+/*
+    This file was taken from the ChipWhisperer Example Target base.
+    Copyright (C) 2012-2015 NewAE Technology Inc.
+
+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "hal.h"
+#include "xmega_hal.h"
+
+void platform_init(void)
+{  
+    OSC.XOSCCTRL = 0x00;
+    OSC.PLLCTRL = 0x00;
+    OSC.CTRL |= OSC_XOSCEN_bm;
+    
+    //wait for clock
+    while((OSC.STATUS & OSC_XOSCRDY_bm) == 0);
+    
+    //Switch clock source
+    CCP = CCP_IOREG_gc;
+    CLK.CTRL = CLK_SCLKSEL_XOSC_gc;    
+    
+    //Turn off other sources besides external    
+    OSC.CTRL = OSC_XOSCEN_bm;
+    
+ #if PLATFORM == CW303
+    PORTA.DIRSET = PIN5_bm | PIN6_bm;
+    PORTA.OUTSET = PIN5_bm | PIN6_bm;
+ #endif
+}
\ No newline at end of file
diff --git a/pyecsca/codegen/hal/xmega/xmega_hal.h b/pyecsca/codegen/hal/xmega/xmega_hal.h
new file mode 100644
index 0000000..d86f9a6
--- /dev/null
+++ b/pyecsca/codegen/hal/xmega/xmega_hal.h
@@ -0,0 +1,45 @@
+/*
+    This file was taken from the ChipWhisperer Example Target base.
+    Copyright (C) 2012-2015 NewAE Technology Inc.
+
+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef XMEGA_HAL_H_
+#define XMEGA_HAL_H_
+
+//Generic Platform
+#include "uart.h"
+
+//We want to use the AVR ADC-pins, since they have a seperate power rail
+#define trigger_setup() PORTA.DIRSET = PIN0_bm
+#define trigger_high()  PORTA.OUTSET = PIN0_bm
+#define trigger_low()   PORTA.OUTCLR = PIN0_bm
+
+#define init_uart init_uart0
+#define putch output_ch_0
+#define getch input_ch_0
+
+#if PLATFORM == CW303
+#define led_error(a) if (a) {PORTA.OUTCLR = PIN6_bm;} else {PORTA.OUTSET = PIN6_bm;}
+#define led_ok(a) if (a) {PORTA.OUTCLR = PIN5_bm;} else {PORTA.OUTSET = PIN5_bm;}
+#endif
+
+void HW_AES128_Init(void);
+void HW_AES128_LoadKey(uint8_t * key);
+void HW_AES128_Enc(uint8_t * pt);
+
+#endif //AVR_HAL_H_
+
+   
\ No newline at end of file