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| author | J08nY | 2020-03-03 15:19:33 +0100 |
|---|---|---|
| committer | J08nY | 2020-03-03 15:19:33 +0100 |
| commit | 714c7509d66afdacd8e9ce0cfe94ec8ae7f76883 (patch) | |
| tree | d428063eb8eb14ec47d0d455a05f505051aa05be | |
| parent | 49018aa37f44b56292193b763ed4a8bb15389c30 (diff) | |
| download | pyecsca-codegen-714c7509d66afdacd8e9ce0cfe94ec8ae7f76883.tar.gz pyecsca-codegen-714c7509d66afdacd8e9ce0cfe94ec8ae7f76883.tar.zst pyecsca-codegen-714c7509d66afdacd8e9ce0cfe94ec8ae7f76883.zip | |
Add tests, for fixed Jacobian stuff.
| -rw-r--r-- | pyecsca/codegen/client.py | 4 | ||||
| -rw-r--r-- | pyecsca/codegen/hal/stm32f3/stm32f3_hal_lowlevel.c | 26 | ||||
| -rw-r--r-- | test/test_builder.py | 3 |
3 files changed, 18 insertions, 15 deletions
diff --git a/pyecsca/codegen/client.py b/pyecsca/codegen/client.py index 07feb93..2b74f7a 100644 --- a/pyecsca/codegen/client.py +++ b/pyecsca/codegen/client.py @@ -234,8 +234,10 @@ class ImplTarget(SimpleSerialTarget): self.send_cmd(SMessage.from_raw(cmd_set_trigger(actions)), self.timeout) self.trigger = actions - def disconnect(self): + def quit(self): self.write(b"x\n") + + def disconnect(self): super().disconnect() diff --git a/pyecsca/codegen/hal/stm32f3/stm32f3_hal_lowlevel.c b/pyecsca/codegen/hal/stm32f3/stm32f3_hal_lowlevel.c index 6eb1999..362f3ab 100644 --- a/pyecsca/codegen/hal/stm32f3/stm32f3_hal_lowlevel.c +++ b/pyecsca/codegen/hal/stm32f3/stm32f3_hal_lowlevel.c @@ -114,6 +114,19 @@ uint32_t HAL_RCC_GetPCLK1Freq(void) } /** + * @brief Returns the PCLK2 frequency + * @note Each time PCLK2 changes, this function must be called to update the + * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. + * @retval PCLK2 frequency + */ +uint32_t HAL_RCC_GetPCLK2Freq(void) +{ + /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ + //return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]); + return 7372800U; +} + +/** * @brief Initializes the RCC Oscillators according to the specified parameters in the * RCC_OscInitTypeDef. * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that @@ -617,19 +630,6 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui return HAL_OK; } -/** - * @brief Returns the PCLK2 frequency - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - //return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]); - return 7372800; -} - #define GPIO_MODE (0x00000003U) diff --git a/test/test_builder.py b/test/test_builder.py index e43ae70..f2760ea 100644 --- a/test/test_builder.py +++ b/test/test_builder.py @@ -11,7 +11,8 @@ class BuilderTests(TestCase): ("basic", ["--platform", "HOST", "shortw", "projective", "add-1998-cmo", "dbl-1998-cmo", "z", "ltr(complete=True)", "."]), ("karatsuba", ["--platform", "HOST", "--mul", "KARATSUBA", "shortw", "projective", "add-1998-cmo", "dbl-1998-cmo", "z", "ltr(complete=True)", "."]), ("strip", ["--platform", "HOST", "--strip", "--no-remove", "shortw", "projective", "add-1998-cmo", "dbl-1998-cmo", "z", "ltr(complete=True)", "."]), - ("montgom", ["--platform", "HOST", "--no-ecdsa", "montgom", "xz", "ladd-1987-m", "dbl-1987-m", "scale", "ldr()", "."]) + ("montgom", ["--platform", "HOST", "--no-ecdsa", "montgom", "xz", "ladd-1987-m", "dbl-1987-m", "scale", "ldr()", "."]), + ("jacobian", ["--platform", "HOST", "--no-ecdsa", "shortw", "jacobian", "add-2007-bl", "dbl-2007-bl", "rtl()", "."]) ]) def test_cli_build(self, name, args): runner = CliRunner() |